NVIDIA open-sources CUDA Tile IR on GitHub
NVIDIA open-sourced CUDA Tile IR, an intermediate representation for GPU programming, on December 4. The company released the code on GitHub under the Apache 2.0 license, making it available for use, modification, and distribution by developers and researchers.
This initiative follows NVIDIA’s introduction of the CUDA Tile GPU programming paradigm with CUDA 13.1 on December 4, marking the platform’s most comprehensive feature expansion since its 2006 launch. The move aligns with NVIDIA’s recent openness strategy for the CUDA ecosystem, revoking its proprietary license for CUDA Tile IR.
CUDA Tile IR is built upon the LLVM project’s MLIR (Multi-Level Intermediate Representation) framework. MLIR has seen adoption across AI and high-performance computing, including AMD’s computing and AI software stack, Google’s IREE project which supports multiple hardware platforms, and Intel’s XeVM MLIR dialect for its hardware. Other IR frameworks such as ONNX-MLIR, Torch-MLIR, and MLIRE-AIE also utilize the MLIR system.
The MLIR foundation potentially allows CUDA Tile IR to be converted to other backends, offering a technical basis for supporting related computing models in non-NVIDIA GPU or accelerator environments. Open-sourcing CUDA Tile IR is expected to advance compatibility and porting projects, including ZLUDA.
The open-source CUDA Tile project includes a Tile MLIR dialect, native Python API bindings, bytecode representation, and a conformance test suite. NVIDIA stated that CUDA Tile IR is “an MLIR-based intermediate representation and compiler infrastructure for CUDA kernel optimization, with a focus on supporting tile-based computational patterns and optimized for NVIDIA Tensor Core units.” The company added the project “provides a complete ecosystem for expressing and optimizing tiled computation for NVIDIA GPUs, aiming to simplify the development of high-performance CUDA kernels by providing abstractions for common tiled patterns, memory hierarchy management, and GPU-specific optimizations.”